Hi All, The next platform HSC meeting is scheduled on Wed Sep 8th 2021 at 8AM PST. Here are the details: Agenda and minutes kept on the github wiki: https://github.com/riscv/riscv-platform-specs/wiki

To implement secure boot OpenSBI should provide a well defined header structure with reserved space in which a vendor can place information related to a signature that the boot ROM code can check. Typ

Hi All, The KVM RISC-V AIA support has been successfully validated with AIA IMSIC virtualization features emulated by QEMU RISC-V. This means KVM RISC-V Guest Linux works perfectly fine with Guest VCP

You have been invited to the following event. Platform HSC Additional Meeting: Platform ISA Requirements Continuing Discussion When Tue Aug 24, 2021 10am – 11am Pacific Time - Los Angeles Where https:

You have been invited to the following event. Platform HSC Bi-Weekly Meeting When Every 2 weeks from 8am to 9am on Monday Pacific Time - Los Angeles Joining info Join with Google Meet meet.google.com/

Hi All, The next platform HSC meeting is scheduled on Mon Aug 23rd at 8AM PST. Some of us are having the issue of RISC-V meetings disappearing off the calendars. So please keep track of this meeting u

Instead of describe the machine-level timer for the M platform, we should simply point to the RISC-V ACLINT MTIMER defined by the RISC-V ACLINT specification. Signed-off-by: Anup Patel <anup.patel@...

The image files (i.e. PNG files) are committed in the repo so we should not remove it when doing "make clean". Signed-off-by: Anup Patel <anup.patel@...> Reviewed-by: Atish Patra <atish.patra@...> ---

We should follow profile naming as-per latest RISC-V profiles specification. Also, we should avoid explicit mentions of "RV32xxx" and "RV64xxx" ISA strings. Signed-off-by: Anup Patel <anup.patel@...>

We don't need a table for required SBI extensions and UEFI interfaces implemented by UEFI firmware. Signed-off-by: Anup Patel <anup.patel@...> Reviewed-by: Alistair Francis <alistair.francis@...> Revi

We re-write the interrupts and timer section to align the interrupts and timer table. We also add more fine grained requirements for AIA. Signed-off-by: Anup Patel <anup.patel@...> Reviewed-by: Atish

The terminology table should be at start and specification table should be at the end. Also, specification table should be replaced with bibliography reference list. Signed-off-by: Anup Patel <anup.pa

This patch updates terminology and specification table in following ways: 1) Provide complete expansion of terms for APLIC and ACLINT 2) Add links to unprivileged and privileged specifications 3) Add

To have a meaningful H-extension support, both OS/A-base and OS/A-server platforms must comply with additional requirements for H-extension. Also, the little-endian requirement in OS/A-base should be

To have a meaningful H-extension support, both OS/A-base and OS/A-server platforms must comply with additional requirements for H-extension. Also, the little-endian requirement in OS/A-base should be

Instead of describe the machine-level timer for the M platform, we should simply point to the RISC-V ACLINT MTIMER defined by the RISC-V ACLINT specification. Signed-off-by: Anup Patel <anup.patel@...

The image files (i.e. PNG files) are committed in the repo so we should not remove it when doing "make clean". Signed-off-by: Anup Patel <anup.patel@...> --- Makefile | 1 - 1 file changed, 1 deletion(

We should follow profile naming as-per latest RISC-V profiles specification. Also, we should avoid explicit mentions of "RV32xxx" and "RV64xxx" ISA strings. Signed-off-by: Anup Patel <anup.patel@...>

We re-write the interrupts and timer section to align the interrupts and timer table. We also add more fine grained requirements for AIA. Signed-off-by: Anup Patel <anup.patel@...> --- Makefile | 4 +-

We don't need a table for required SBI extensions and UEFI interfaces implemented by UEFI firmware. Signed-off-by: Anup Patel <anup.patel@...> Reviewed-by: Alistair Francis <alistair.francis@...> Revi