Hi All, To support native debugging in S-mode and VS-mode, we need a SBI Debug Trigger extension which complements the Sdtrig extension. Below is the draft proposal of the SBI Debug Trigger Extension.

To add on to Alan's point. These "extension" names were created simply to represent individual line items in the Profiles. In many cases these represent a one or two sentence statement in a Profile ab

FYI: here is a rough initial draft of the architectural options that I've been able to dig up. I know that this is very, very likely to be incomplete. This is written from the perspective of how to ma

Duplicating the information (i.e. having the individual extensions marked and the profile itself indicated) seems like an error-prone proposal, unless we mandate/enforce consistency checking. Given th

If you're looking at the same thing I was looking at: the "extension names" are not extensions, in the usual sense. They are names for the values of architectural options of extensions that already ex

I'm also unclear of the "identifier" you mention for other unmentioned option value (e.g. your 64b cache block size example). Who is the consumer of that identifier? Is this a value you would expect t

Hi, I'm top posting with some notes that Furquan helped me put together to cover the things we've been talking about. We may want to put these and future notes somewhere else (drive, github, etc) so p

I think of UD being orthogonal to this discussion. Firmware world | OS world | [UD, etc. ]---firmware builds-+->[ACPI/DT]--->OS | | So the comments about early boot etc. in this thread I read as refer

Hi Aaron, Few comments below ... Rather than gating these ACPI ECR efforts on AIA spec being frozen. We should start sending out incremental ECRs for the things that are already ratified. Each ECR wil

Hi All, First off, please redirect me where the most appropriate forum is to discuss this topic. I am casting a fairly wide net, but that's just trying to cover those who are impacted. We can convene

Hi All, Please review below Engineering Change Request (ECR) to update the ACPI spec for enabling basic ACPI support for RISC-V. 1) Add INTC structure in MADT Table - https://docs.google.com/document/

Sunil Hi - July 4 is a holiday in the US. COuld we meet on 5th? regards ved

You have been invited to the following event. Ad-hoc ACPI ECR Review meeting - Part 2 When Mon Jul 4, 2022 9:30pm – 10:30pm India Standard Time - Kolkata Joining info Join with Google Meet meet.google

Hello Sunil, Thanks for sending out these ECRs. After looking at these documents, we have a lot of comments/questions, but I think it might be productive to walk through the assumptions and approach f

Hi All, Based on feedback, below is the updated draft proposal of the SBI Debug Console Extension ... The motivations behind this proposal is as follows: 1) There is no new SBI extension replacing the

You have been invited to the following event. Ad-hoc ACPI ECR Review meeting When Mon Jun 27, 2022 9:30pm – 10:30pm India Standard Time - Kolkata Joining info Join with Google Meet meet.google.com/dao

Although the deadline has past, it was mentioned at the Software HC meeting last week that there are no candidates for the vice-chair position, so I would like to nominate myself. I have been involved

we have seen a number of SBI changes proposed (debug console, ap tee, ...). will there be one big rev ala priv 1.12, small fast tracks , something else? I also suggest that this either needs to be run

Hi All, Below is the draft proposal for SBI Debug Console Extension. Please review it and provide feedback. Thanks, Anup Debug Console Extension (EID #0x4442434E "DBCN") ==============================

That is because it is useful to have debug console output when porting a hypervisor or baremetal code to a new board. Of course, if a hypervisor is already available for the board, then it would be ju