Hi All, Apologies for cross posting multiple lists. Just wanted to reach out to the maximum audience as this is a short notice to set up the first meeting. This is just a quick notice that the first P

Hi All, We are pleased to announce the early formation of Platform Runtime Services(PRS) Task Group with Atish Patra from Rivos as the acting chair and Sunil VL from ventana as the acting vice chair.

cross-posting for more visibility. ---------- Forwarded message --------- From: Atish Kumar Patra <atishp@...> Date: Thu, Sep 1, 2022 at 11:55 AM Subject: Call for Chair/Vice-Chair Candidates for Plat

Hi All, I put a meeting on the RISC-V calendar for Thursday September 1 @ 9am PT. I'll send the slides out earlier in the week for people to critique and add suggestions of topics. We'll go over the c

I don't think we should submit this one until we settle on how we convey behaviors outside of an ISA string. I suspect that will change so we should anticipate that. Right now we have ISA string plus

Hi All, Based on feedback, below is the updated draft proposal of the SBI Debug Console Extension ... The motivations behind this proposal is as follows: 1) There is no new SBI extension replacing the

Slimming down the CC list a bit, as this is off topic for some lists. I'm in the process of getting status from the new Unified Discovery group: https://lists.riscv.org/g/tech-config/message/743 We're

Hi All, To support native debugging in S-mode and VS-mode, we need a SBI Debug Trigger extension which complements the Sdtrig extension. Below is the draft proposal of the SBI Debug Trigger Extension.

To add on to Alan's point. These "extension" names were created simply to represent individual line items in the Profiles. In many cases these represent a one or two sentence statement in a Profile ab

FYI: here is a rough initial draft of the architectural options that I've been able to dig up. I know that this is very, very likely to be incomplete. This is written from the perspective of how to ma

Duplicating the information (i.e. having the individual extensions marked and the profile itself indicated) seems like an error-prone proposal, unless we mandate/enforce consistency checking. Given th

If you're looking at the same thing I was looking at: the "extension names" are not extensions, in the usual sense. They are names for the values of architectural options of extensions that already ex

I'm also unclear of the "identifier" you mention for other unmentioned option value (e.g. your 64b cache block size example). Who is the consumer of that identifier? Is this a value you would expect t

Hi, I'm top posting with some notes that Furquan helped me put together to cover the things we've been talking about. We may want to put these and future notes somewhere else (drive, github, etc) so p

I think of UD being orthogonal to this discussion. Firmware world | OS world | [UD, etc. ]---firmware builds-+->[ACPI/DT]--->OS | | So the comments about early boot etc. in this thread I read as refer

Hi Aaron, Few comments below ... Rather than gating these ACPI ECR efforts on AIA spec being frozen. We should start sending out incremental ECRs for the things that are already ratified. Each ECR wil

Hi All, First off, please redirect me where the most appropriate forum is to discuss this topic. I am casting a fairly wide net, but that's just trying to cover those who are impacted. We can convene

Hi All, Please review below Engineering Change Request (ECR) to update the ACPI spec for enabling basic ACPI support for RISC-V. 1) Add INTC structure in MADT Table - https://docs.google.com/document/

Sunil Hi - July 4 is a holiday in the US. COuld we meet on 5th? regards ved

You have been invited to the following event. Ad-hoc ACPI ECR Review meeting - Part 2 When Mon Jul 4, 2022 9:30pm – 10:30pm India Standard Time - Kolkata Joining info Join with Google Meet meet.google