Hi all,

Firstly, thanks for the vector intrinsic specification RFC.
It's a very timely proposal that meets exactly the requirements of RISC-V fans.
We have learned a lot from it.

As far as we know, the EPI team has open sourced the vector intrinsic interface implementation on the LLVM project,
and their approach has inspired us a lot. The latest RISCV GCC toolchain does not yet support this feature.

After reviewing the RFC, we found that it's very similar to our implementation.
In order to speed up this proposal and help developers using vector,
we are willing to modify the our implementation based on the RFC.

Based on our implementation, which has passed a lot of tests and application development tests,
I think it will be very helpful to make the vector compiler stable in a short time.

In order to meet the urgent needs of vector developers,
we provide a vector development kit (including prebuild compiler, QEMU simulator, Linux image, user manuals, etc.) on the github.
As RFC moves forward, we will update it in time.
I hope it will be helpful for vector developers, and validates new ideas in RFC. :)

Here is current status of the vector development kit.
Pls feel free to contact with us drectly if you have any questions.

Current status:

* Support vector extension instruction standard 0.7.1, you can download the intrinsic user manual [0]
* Open source qemu [1] that it has supported vector extension instruction standard 0.7.1
* Several code examples to help you use vector intrinsic [2]
* Prebuild tools (compiler, qemu simulator, etc.) [3]
* Quickstart steps can be found from our github [4]
* All source code related to the vector extension instruction of GNU toolchain will be opened in the near future


[0] https://github.com/c-sky/xuantie-vector-demos/blob/master/VectorIntrinsicManual.pdf
[1] https://github.com/romanheros/qemu
[2] https://github.com/c-sky/xuantie-vector-demos/tree/master/test
[3] https://github.com/c-sky/xuantie-vector-demos/blob/master/riscv64-linux-x86_64.tbz2
[4] https://github.com/c-sky/xuantie-vector-demos

—Jojo

在 2020年5月8日 +0800 AM12:18，Kai Wang <kai.wang@...>，写道：

Hi,

We, EPI, SiPearl, and SiFive, have come out with a RFC for vector intrinsics. Although there are still some issues under discussion, we think it is time to publish the document to collect more feedback from the community. You could access the documents from the github repository[0].

In this RFC[1], we defined the type system, programming interface and naming rules for vector intrinsics in the C language.

Currently, there are a few issues[2] under discussion.

1. With or without `vl` argument in the intrinsic interface.
2. C operators for scalable vector types.
3. Vector types for segment load/store.
4. Fractional LMUL representation.

We need your opinions and feedback about these issues. Besides these issues, welcome any feedback about vector intrinsic design.

[0] https://github.com/sifive/rvv-intrinsic-doc/

[1] https://github.com/sifive/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md

[2] https://github.com/sifive/rvv-intrinsic-doc/issues