Whole Register Loads and Stores
The whole register loads and stores in section 7.9 of the spec are
currently specified as having an element size of 8-bits. Could they be
extended to cover all sizes instead of just the 8-bit size? It looks
like the encoding space is there.
The different sizes would do the same thing functionally, but they allow
software to avoid the requirement for hardware to insert a cast
operation in many circumstances by defining a byte arrangement and
setting the corresponding tag for element size.