minor typos; substantial correction:
On 2020-06-29 10:12 a.m., David Horner
via lists.riscv.org wrote:
Although I agree
that the proposal itself can be implemented in a manner consistent
with the current vsetvli definition,
I disagree that the larger issue of how to expand vsetvli
immediate bits is sufficiently addressed to make the decision to
As a result I ask that at least the larger issue be addressed for
As background, #460 [not 440] is a refinement of an
approach to encode vtype bits in rd and rs1 [not vd and vs2] fields.
The details are on github and references to like prior proposals
I posted on #460 this response to labeling it "Resolve after
also throughout the email
vd should be rd
vs1 should be rs1
And vs2 is completely bogus.
Sorry I didn't catch this sooner.