Re: A couple of questions about the vector spec
On Tue, Mar 10, 2020 at 3:07 PM Guy Lemieux <glemieux@...> wrote:
1. A vector register is deliberately used as the destination of
Indices must be able to represent general pointers in some cases (e.g. vectorizing (*(x[i]))++ instead of y[x[i]]++), so implicitly scaling the indices causes problems, particularly when misaligned addresses are legal.
The 64-bit instruction encoding could offer another variant of these instructions that scales indices by SEW/8. In the mean time, I don't think the extra shift is too much to ask.