Re: Vector Memory Ordering
I think from this morning, we are considering:
- Ordered scatters are done truly in order
I tentatively agree *if* "truly in order" means "as if writes were the equivalent scalar writes of the register elements processed in order from 0 to vl" .
However, RVWMO should be assumed and no further strengthening of "order" should be stipulated.
None overlapping element writes are allowed in RVWMO global memory order to freely pass each other.
I would however prefer to weaken
as #528 recommends (in addition to a mnemonic change):
... VSUXEI ... stipulate that the net result of the operation allows multiple outcomes visible to the local hart; essentially depending upon which element is last written to overlapping memory locations.
... [VSXEI] to stipulate that the data written to memory will be as if the active elements were first copied to an XLEN length buffer ... processing the elements in the order from 0 to vl, and then only the affected bytes written to memory in whatever order RVVWMO allows.
The ideas are that
- rather than suggesting VSUXEI is the exception to the rule, it indicates that the ordered VSOXEI is a more constrained alternative to the default processor model that allows concurrent execution wherever possible and
- VSOXEI makes no guarantee on what is globally visible than what the RVVWMO model allows
- VSUXEI is still constrained by the RVVWMO rules.