Re: Mask Register Value Mapping
You got my thumbs up!
Definitely "something similar" and better that my more cryptic proposal.
Thanks you Cohen for raising these concerns and Nick for moving
this along so quickly.
The existing draft used the notation v0.mask[i] in dozens of places to denote subscripting of a mask vector (bit granularity). I opted to use the existing notation uniformly, rather than switch to David's proposed v0[i].m . Happy to debate.
The .mask suffix was not previously used in unsubscripted contexts, and I did not introduce it there.
My PR is here: https://github.com/riscv/riscv-v-spec/pull/572 . Let's move further discussion to Github.
On Wed, Sep 23, 2020 at 3:11 PM Andrew Waterman <andrew@...> wrote:
On Wed, Sep 23, 2020 at 2:45 PM David Horner <ds2horner@...> wrote:
On Wed, Sep 23, 2020, 15:10 CDS, <cohen.steed@...> wrote:
Word of caution: there may be a utility/readability concern if the ".LSB" text is removed, only.
This would create a phrase
vs2[i] + vs1[i] + v0[i]
which can easily be misleading to the reader - while 'i' has the same value for all three terms, the first two indicate a SEW bit field, whereas the final term indicates a single bit.
Suggestions: include a reminder that v0[i] entries are a single bit under the opening comment in the code block ("Produce sum with carry."); Set a reminder at the bottom of the description section before starting the code text, or indicate a comment on the code line "#Vector-vector-bit".
Or my preference a similar annotation that explicitly identifies it as a mast bit:vs2[i] + vs1[i] + v0[i].m