Re: [RISC-V] [tech-cmo] Fault-on-first should be allowed to return randomly on non-faults (also, running SIMT code on vector ISA)
On 2020-10-16 10:30 a.m., krste@... wrote:
The forward progress is to advance to another task.| First I am very happy that "arbitrary decisions by theOn Fri, 16 Oct 2020 07:48:00 -0400, "David Horner" <ds2horner@...> said:
In the case of machine mode it can potentially "resolve" the cause of the vl=0 return and re-execute the loop (without the overhead of the trap).
The similarity is the avoidance of trap handling, when it is sufficient to check instead register state.
Ok. I can see providing guidance as to when vl=0 is allowed, but not to exclude it outright.