Re: vector strided stores when rs1=x0
Sorry, slightly off topic, but what was the rationale for
When `rs2!=x0` and the value of `x[rs2]=0`, the implementation must perform one memory access for each active element (but these accesses will not be ordered).
I guess I'm thinking about the possibility of a toolchain relaxing `li, x1, 0; inst x1` into `inst x0`.
On Mon, Nov 9, 2020 at 10:09 AM Krste Asanovic <krste@...> wrote: