Re: Vector Task Group minutes 2020/12/04


Grant Martin
 

 Having been a silent observer of this group for what seems like a very long time, but now recently liberated from previous constraints, I will observe that I have seen the use in DSPs of both dedicated mask register files and use of general vector type registers to serve this purpose.

Along with operations for manipulating them.

While there are pros and cons for both, I lean to the side of not having a special mask register file and special operations, but instead use existing resources and operations.

However I have a process observation as well - it has taken RV Vector proposal a long time to converge to a near 1.0 specification.  Would going down a different route cause enough delay and debate that it would derange the process and significantly delay the standardization that is desired?  As opposed to more modest suggestions.

Thanks and best regards 

Grant Martin
gmartin@...
(gmartin15@...)
Mobile +1.510.703.7470
Home +1.925.846.8683

On Dec 16, 2020, at 12:54 PM, swallach <steven.wallach@...> wrote:


i guess i am looking at the wrong set of apps.  

in any case VM registers NOT in the vector registers permits a robust and performance optimized operations under mask. 

wrt extra instructions. i am neutral.  


On Dec 16, 2020, at 3:49 PM, Roger Espasa <roger.espasa@...> wrote:


8 Maks registers are quite needed in modern outer-vectorized loops. Also in graphic shaders. I would say 16 is overkill. 

Now, and I am not defending this, if we had to go this route, I would seriously fight for masks-in-x-registers. I.e :no new state , no new instructions. Only a few arch tricks to try to avoid loss of decoupling between vector unit and scalar unit.  That’s better than a new set of registers and instructions

Roger. 

On Wed, 16 Dec 2020 at 21:34, swallach <steven.wallach@...> wrote:
in my experience only only one maybe two vm registers are needed

nested loops under if statements is rare.   



> On Dec 16, 2020, at 3:29 PM, Bill Huffman <huffman@...> wrote:
>
> I don’t think a separate mask register will do at all.  It would take a mask register file with at least 8 and maybe 16 registers.  Lots of compare results need to be kept and operations need to be done on mask registers.  I don't think we should have a separate mask register file.
>
>      Bill
>
> -----Original Message-----
> From: tech-vector-ext@... <tech-vector-ext@...> On Behalf Of swallach
> Sent: Wednesday, December 16, 2020 12:26 PM
> To: Alex Solomatnikov <sols@...>
> Cc: Krste Asanovic <krste@...>; tech-vector-ext@...
> Subject: Re: [RISC-V] [tech-vector-ext] Vector Task Group minutes 2020/12/04
>
> EXTERNAL MAIL
>
>
> i  totally agree.  if this is done,  then instructions like:  count bits,  etc can directly apply to the mask register.
>
> also,  from a hardware implementation,   the VM register can be implemented with LATÇHES.  this facilitates a better implementation (imho) for operations under mask
>
> and yes load and store VM are required
>
> ——
>
>
> If separate loads and stores are introduced for mask, then separate vmask register can be introduced to avoid dual use of v0 (as a regular vector register and as a mask register) and its complications.
>
> Alex
> https://urldefense.com/v3/__http://bsc.es/disclaimer__;!!EHscmS1ygiU1lA!RJHAWw-769bPQyIHjTxb9o5uKdCXTVYJl2Bab73oZY-l_MvY1RgkMuZPnlTs5wU$
>
>
>
>
>


http://bsc.es/disclaimer







WARNING / LEGAL TEXT: This message is intended only for the use of the individual or entity to which it is addressed and may contain information which is privileged, confidential, proprietary, or exempt from disclosure under applicable law. If you are not the intended recipient or the person responsible for delivering the message to the intended recipient, you are strictly prohibited from disclosing, distributing, copying, or in any way using this message. If you have received this communication in error, please notify the sender and destroy and delete any copies you may have received.

http://www.bsc.es/disclaimer

Join tech-vector-ext@lists.riscv.org to automatically receive all group messages.