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Re: Vector Task Group minutes 2020/12/04
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imho, since are trying to both address the embedded market and the hpc market, we have conflicts wrt logic, power, and cost
addressing the hpc market, 8 extra registers for VM, appropriately defined, that increases the performance of loops with conditionals, is not an issue. on the other hand, for embedded these registers may be un necessary overhead. attached is a paper on what ARM and fujitsu have implemented. just for a reference. worth a read http://bsc.es/disclaimer
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