Re: GCC RISC-V Vector Intrinsic Instructions and #defines missing #defines


Kito Cheng
 

Hi Tony:

Could you create issues on github to track that?
https://github.com/riscv/riscv-gcc

Thanks :)

On Sat, Apr 10, 2021 at 9:14 AM Jim Wilson <jimw@...> wrote:

On Fri, Apr 9, 2021 at 3:40 PM Tony Cole via lists.riscv.org <tony.cole=huawei.com@...> wrote:

I’m still new to RISC-V and the Vector extensions, so forgive me if I’ve missed something, the following have been fixed or noted before.

Also, am I sending this to the correct group for GCC RISC-V Vector Intrinsics? If not, who and how should I inform?

I would suggest filing an issue in the riscv/riscv-gnu-toolchain github tree. Put something like vector or rvv in the issue title to make it clear it is a vector related issue. The gcc support is not being actively worked on at the moment. LLVM is the current focus for all vector compiler support. Eventually someone may start working on the gcc vector support again. Meanwhile, bugs filed against the gcc vector support may or may not be fixed.

Jim

Join tech-vector-ext@lists.riscv.org to automatically receive all group messages.