Re: Smaller embedded version of the Vector extension
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The uppercase-V V extension is meant to cater to apps processors, where the VLEN >= 128 constraint is not inappropriate and is sometimes beneficial. But there's nothing fundamental about the ISA design that prohibits VLEN < 128. A minimal configuration is VLEN=ELEN=32, giving the same total amount of state as MVE. (And if you set LMUL=4, then you even get the same shape: 8 registers of 128 bits apiece.)
Such a thing wouldn't be called V, but perhaps something like Zvmin. Other than agreeing on a feature set and assigning it a name, the architecting is already done.
(If you search the spec for Zfinx, you'll see that a Zfinx variant is planned, but only barely sketched out.)
On Wed, Jun 2, 2021 at 3:04 AM Tariq Kurd via lists.riscv.org <tariq.kurd=huawei.com@...> wrote: