Re: Smaller embedded version of the Vector extension
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There is nothing to prevent implementing 32x 32 bit registers on a 32 bit CPU. The application processor spec has quite
recently (a few months) specified a 128 bit minimum register size but I don't think there's any good reason for this,
especially in embedded.
With that configuration, LMUL=4 gives 8x 128 bits, the same as MVE.
If floating point is desired then Zfinx is available, sharing int & fp scalar registers instead of fp and vector registers.
Of course profiles (or just custom chips for custom applications) can define subsets of instructions.
On Wed, Jun 2, 2021 at 10:05 PM Tariq Kurd via lists.riscv.org <tariq.kurd=huawei.com@...> wrote: