Re: Is it safe to extend LMUL's maximum value based on current rc2 version?

David Horner

Thank you for this very important consideration.

On 2021-10-05 6:29 a.m., Feng Chuang wrote:
hi  Krste and all friends,

Per my understanding, if I extend the vector architecture register number (to be larger than 32) and extend maximum LMUL value to be larger than 8, current vector extension (v1.0) still works fine in terms of completeness and correctness, given mask value can be read from multiple continuous vector registers and even with a mask register specifier as indicated in the spec note for future extension.
Yes. The expectation is that many of the current constraints will be relaxed in future versions.
I'm thinking in in this way for our future design thus wondering whether anyone already on this way and any experience can be shared especially on compatibility and tool chain related work.
It is here that I most appreciate your interest. I have not followed the rvv doc and intrinsic efforts as specifically for artificial/structural assumptions on constrains as I now belive I should have. given the intent to relaqx certain of these constraints.
I tried searching related discussion but couldn't found obvious discussion on LMUL > 8 (maybe that was in too early stages and hadn't been archived into this workgroup).

There was extensive discussion on changing masks structure from being tied to LMUL and ELEN to being an ordinal value with the bits for any element [regardless of size]always in the same place.

Decoupling mask in this way allows spanning more than 8 registers in a register set.LMUL's

On the hithuib site there are many issues flagged as post v1.0. Some of these relate directly to your desire to extend rvv.

One such suggestion was to relax the LMUL restriction for widening functions so that LMUL=8 inputs would effect ELMUL of 16.

This modest extension is still on the books for consideration.

But in general rc2 has "whole new world" possibilities that in my opinion could drastically benefit future implementations, especially the minimal configurations that could have , as an example, full utilization of the rvv register file for move word operations.

Thanks in advance! Appreciated if any sharing/help. 

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