Re: RISC-V Vector Extension post-public review updates - fault flagging
Jonathan Behrens <behrensj@...>
Are the mechanisms you mentioned hypothetical future ISA extensions, or something included in the current vector extension? In particular, I don't see anything about M-mode and/or HS-mode requesting a trap if too many non-faulting fault-first-load instructions are executed which modify vl. Jonathan
On Wed, Nov 17, 2021 at 9:19 PM David Horner <ds2horner@...> wrote:
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