Re: [RISC-V] [tech-unprivileged] [RISC-V] [tech-vector-ext] FP Trapped exceptions needed for portability


I’d suggest identifying important use cases for this. I’d also be looking at
software techniques where the compiler inserts checks to provide the
necessary support for the use cases first.
Along with this, I'd suggest considering an extension that consists of just
one instruction: trap if (FP flags & mask in instruction) is non-zero. I'm
not a hardware designer, but it seems to me that this would allow
floating-point computation to run at full speed until a point selected by
the programmer or compiler where a precise trap was needed, and the more
instructions the compiler can place between the FP computation and the
conditional trap, the less likely a pipeline stall.


L Peter Deutsch <ghost@...> :: Aladdin Enterprises :: Healdsburg, CA

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