Re: Vector element groups
| Krste,On Fri, 26 Aug 2022 13:58:28 +0200, Abel Bernabeu <abel.bernabeu@...> said:
| Sorry it took me a long time to provide feedback.
| Yes, this is the kind of feature we could need for graphics and GPGPU-style SIMT. Many thanks for taking the
| time to think about how the idea behind Zediv can be introduced.
| This is the kind of concept that is needed for designing with vectors for things that are typically designed
| with warps.
| One comment I have is that groups of 3 elements are not power of two and turn out to be:
| - popular for graphics
| - demanded by OpenCL as well
- and a real pain to handle as an element group.
I tried looking at ways to incorporate non-POT group sizes, but they
just introduce too many corner cases that implementations will not
want to handle.
Handling them as four-element groups seems fairly common in other
graphics-oriented programmable hardware, at least old packed-SIMD
ISAs. I took a quick look and OpenCL even specifies that the 3-vectors
are aligned on 4-element boundaries in memory, so that would work fine
with the element group model.
Of course, the 3-element vectors can instead be handled as 3-field
segments, loading the three components into separate vector registers.
| Is there anything we can do from the graphics SIG to help drive this work?
| On Fri, Jul 22, 2022 at 10:36 AM Krste Asanovic <krste@...> wrote:
|||||| On Fri, 15 Jul 2022 09:10:49 -0700, Earl Killian <earl.killian@...> said:
| | While I share some concern about the cited language, as this is a concept, and not a spec, I think the
| time to require checking
| | would be when individual specs implement the concept. I would think it would require some pretty good
| justification to not have
| | an exception.
| On further thought, I do think it makes sense to require raising of an
| illegal instruction exception when vl is not a multiple of element
| group size rather than leaving reserved. Will be updating the doc
| with rationale.