Dear Craig and Roger, ​ ​Thanks a lot for providing me goodsolution. I have tried them, they are all good solutions of upsample application. ​ ​ But, when it comes to other applications, such as zip/u

Hi, all I encountered a difficulty of applying "vrgather" instruction recently. The details are shown blow: The date from source should be duplicated as pair in a upsample application. Eg: src = [0, 1

Hi，David Can we see the git of your work? My code has not been upload to git, and I will show it in the mail. Does this mean the 32 vector registers are not enough, or that the number of elements for

Hi，all Recently, I optimized the kernel of GEMM for int8 data. I found that there was no good solution to do in by the use of the present vector ISA. The mainly difficult I meet is: The accumulator is

Hi, all I have a problem about the usage of VectorAMO Operations. In the spec, there is only two sentences to describe the usageof Vector AMO Operations. Who have the concrete sample or other applicat

Hi, Nick That is a good suggestion for my code, thank you very much. But I develop my code depend on spec 0.7.1. The q-wide instructions had not been added to the spec. And I am confused with the upda

I agree with your point. But nowadays, the spec is not stable, and there is no target SOC to verify it. So, in my opinion, the number of instructions is an important indicator at present. 发件人: Bruce H

Hi，all I have some applications about byte/halfword/word vector load/stores, like gemm, direct convolution and son on. For 3x3 direct convolution, the code without byte/halfword/word vector load/store