8 Maks registers are quite needed in modern outer-vectorized loops. Also in graphic shaders. I would say 16 is overkill. Now, and I am not defending this, if we had to go this route, I would seriously

Did you keep/add text encouraging implementations to indeed raise illegal on reserved encodings ? I went through the patch (rather quickly) and did not see it. Roger

So all the vleff use cases end up then using a vmpopc of some sort to determine the exit condition and never use the trimmed VL ? (other than, of course, to control within the while how many elements

We're all in agreement that if the spec says "pick where you stop" we'd all pick to trim to VL=3. I was under the impression this was not yet closed (in light of the "stop at cache misses" discussion)

Bill you said element 9, but did you mean element labeled "a" which is the 11th element in the vector? (I agree with that). However, I would NOT agree that a masked out element has been written, even

Here's where the "implementation" cost comes in (at least in our implementation; others, of course, may have more clever ways of doing this) -> If you pick "vl=3", then the vstart and vltrim calculati

Here's a question for the group: I did in as a picture... hopefully it will go through the mailing list:

Joseph, May I suggest you open a git issue here: https://github.com/riscv/riscv-v-spec/issues with these two questions? It will help better tracking and will ensure whatever the resolution is, it does

You're absolutely right. Thanks for the correction.

I was trying to summarize/compare the different proposals. I talked to Grigoris and I think this is a correct summary: v08 v09 Grigoris LMUL=1 SLEN=VLEN SLEN does not matter SLEN does not matter SLEN

I really like the fact that this solves indexed. It's a pretty good proposal overall, and I think it beats adding "quad" extension and then a debate over "quad-with-add", "quad-with-sub", "quad-with-<

On #2, it would require finding a 2 bit field in the vector load format to encode "no-scaling/2/4/8". Not trivial within the 32b format. On Wed, Mar 11, 2020 at 1:30 AM Nagendra Gulur <nagendra.gd@gma

Not really challenge :-) But it's the only option if you can't / don't want to add a "vstart" equivalent (because you don't want to save/restore it...) @Nagendra: note that the spec does require the m