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vector intrinsics for both RV32/RV64

Guy Lemieux
 

Hi,

I’m starting a project where we want to use vector intrinsics and generate both 64b and 32b code (for RV64 and RV32).

It looks line the best way to do this right now is with GCC, where we were able to find up-to-date intrinsics for the v0.10 spec:


Is there a similar ability with LLVM? Vector support seems to be added, but no up to date intrinsics yet. This is the closest I could find, but it appears to be a bit out of date (vector spec 0.8) and only for RV32:


Sorry if this is an obvious question — I haven’t dug very deeply into this yet, but I thought this group would be able to give me better answers and save me a bit of time.

Thanks for any pointers.

Guy
Craig Topper
 

Hi Guy,

The latest LLVM git repository should have support for all intrinsics except segment load/store. The intrinsics missed the branch window for the LLVM 12 release, but should be in LLVM 13 when it is released in the second half of the year.

The riscv_vector.h header is autogenerated from other files when clang is built so you won’t find the header in the repository.

~Craig

On May 12, 2021, at 10:52 AM, Guy Lemieux <guy.lemieux@...> wrote:

Hi,

I’m starting a project where we want to use vector intrinsics and generate both 64b and 32b code (for RV64 and RV32).

It looks line the best way to do this right now is with GCC, where we were able to find up-to-date intrinsics for the v0.10 spec:


Is there a similar ability with LLVM? Vector support seems to be added, but no up to date intrinsics yet. This is the closest I could find, but it appears to be a bit out of date (vector spec 0.8) and only for RV32:


Sorry if this is an obvious question — I haven’t dug very deeply into this yet, but I thought this group would be able to give me better answers and save me a bit of time.

Thanks for any pointers.

Guy
Jim Wilson
 

On Wed, May 12, 2021 at 10:52 AM Guy Lemieux <guy.lemieux@...> wrote:
I’m starting a project where we want to use vector intrinsics and generate both 64b and 32b code (for RV64 and RV32).
It looks line the best way to do this right now is with GCC, where we were able to find up-to-date intrinsics for the v0.10 spec:

There is a gcc RVV port from SiFive, but it has been dormant for months, and is not being actively maintained at the moment.  You are better off using LLVM instead which is actively being worked on by multiple parties including SiFive.
Jim

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