Date   
Zve should be a strict subset of V, use new option to relax VLEN 5 messages By Guy Lemieux ·
Vector TG Meeting Minutes 2021/07/09 By Krste Asanovic ·
Vector TG Meeting tomorrow 5 messages By Krste Asanovic ·
Vector TG Meeting tomorrow - imprecise trap description/use. By David Horner ·
Vector TG meeting minutes 2021/07/02 2 messages By Krste Asanovic ·
Vector TG meeting tomorrow usual time slot By Krste Asanovic ·
Smaller embedded version of the Vector extension 34 messages By Tariq Kurd ·
No vector TG meeting tomorrow - preparing to start public review 3 messages By Krste Asanovic ·
Potential Vector Task Group Meeting and v1.0-rc1 review reminder by June 25 By Krste Asanovic ·
回复:Re: 回复:[RISC-V] [tech-vector-ext] RISC-V Vector Spec version 1.0-rc1-20210608 6 messages By Linjie Yu ·
Background for Policy/Workflow revisions on Github close concern. By David Horner ·
回复:[RISC-V] [tech-vector-ext] RISC-V Vector Spec version 1.0-rc1-20210608 2 messages By Linjie Yu ·
RISC-V Vector Spec version 1.0-rc1-20210608 By Krste Asanovic ·
Smaller embedded version of the Vector extension By Krste Asanovic ·
Smaller embedded version of the Vector extension By Tariq Kurd ·
答复: [RISC-V] [tech-vector-ext] Smaller embedded version of the Vector extension By Shaofei (B) ·
Check mask all ones / all zeros 9 messages By Roger Ferrer Ibanez ·
LLVM with RVV intrinsic support 2 messages By Kai Wang ·
vector intrinsics for both RV32/RV64 3 messages By Guy Lemieux ·
FYI: ARM vs. RISC-V vector extension conmparison 3 messages By Allen Baum ·
1 - 20 of 183